1. Field of the Invention
The present invention relates to a programmable static selection circuit to be included in integrated circuits with programmable cells, such as EPROMs, EEPROMs, FLASHs and the like, for example programmable logic devices (also known as PLDs) and analog or hybrid programmable devices.
2. Prior Art
As is known, PLDs (and other similar devices) perform the required logic functions by appropriately programming arrays of programmable cells, some of which are preset for the once-only selection of accessory conditions, such as the definition of the pins as input or output terminals.
In order to provide such selections, circuits are known which assume one of two different operative conditions depending on the state (virgin or written) of a preset cell of the integrated device. Said circuits must meet, among other things, the requirement of an extremely reduced or even nil power consumption. Known circuits having this purpose typically employ capacitors which occupy a considerable silicon area, and since they reach their operative condition by means of a dynamic operation, in extreme conditions of the operating parameters they can assume an undefined state which prevents the correct operation of the PLD.